R&D Engineer for Advanced Metallization
Research & development - Leuven | About a week ago The continued scaling of CMOS logic and memory technologies is increasingly limited by the performance, resistivity, and integration complexity of advanced metallization schemes. As device architectures transition to deeply scaled nodes and 3D structures (e.g., CFET, high-aspect-ratio interconnects, and advanced memory stacking), conventional materials and processes such as Cu dual damascene face fundamental challenges related to line resistance, electromigration, barrier thickness overhead, and integration thermal budgets. This drives the…
